DaRT Short Presentations and Demos
All these files as a .zip archive.
Introduction
Foundations
Top level models
Model driven engineering
Loop transformations in Array-OL
Formal validation
TLM and performance evaluation
Synthesis
Special Focus
Reconfigurable NoC
Repetition Compilation
Massively parallel processing on a chip
Control flow / data flow
Mapping and scheduling heuristics
Deployment modeling
Co-simulation platform
Others
Application Domains
Gaspard2 development
MARTE profile
Transfer, funding, publications
Demos
Correlation algorithm
Modeling with MagicDraw
Compilation with the Gaspard2 Eclipse plugin
VHDL synthesis for FPGA
OpenMP
ArrayOL Transformations
Gaspard2 to Lustre
NoC SystemC
DaRT INRIA project-team (Jean-Luc Dekeyser)
Last modified: Wed May 2 10:30:33 2007